diff options
| author | chn <chn@chn.moe> | 2023-05-16 20:58:40 +0800 |
|---|---|---|
| committer | chn <chn@chn.moe> | 2023-06-11 21:11:03 +0800 |
| commit | a41e973062ddc4b0d1d43f1e11dfa25f0068d2a2 (patch) | |
| tree | f92e5cbcb2ec123a16713940d7758abea2c836ca /lib | |
| parent | 1c03751c301f19cf8f2f4ffab6bd5753f86e699b (diff) | |
stdenv: add alderlake support
Signed-off-by: Haonan Chen <chn@chn.moe>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/systems/architectures.nix | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/systems/architectures.nix b/lib/systems/architectures.nix index 57b9184ca60cd..782c9e25bee12 100644 --- a/lib/systems/architectures.nix +++ b/lib/systems/architectures.nix @@ -18,6 +18,7 @@ rec { cascadelake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ]; cooperlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ]; tigerlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ]; + alderlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "fma" ]; # x86_64 AMD btver1 = [ "sse3" "ssse3" "sse4_1" "sse4_2" ]; btver2 = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" ]; @@ -55,6 +56,8 @@ rec { cascadelake = [ "skylake-avx512" ] ++ inferiors.cannonlake; cooperlake = [ "cascadelake" ] ++ inferiors.cascadelake; tigerlake = [ "icelake-server" ] ++ inferiors.icelake-server; + # CX16 does not exist on alderlake, while it does on nearly all other intel CPUs + alderlake = [ ]; # x86_64 AMD # TODO: fill this (need testing) |