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| author | Weijia Wang <9713184+wegank@users.noreply.github.com> | 2023-11-04 19:05:27 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-04 19:05:27 +0100 |
| commit | ed6188ec2f8f60412d2a028373c5aa09166c188c (patch) | |
| tree | 22ddcd40c6c27eb6f2799b2d0c141c7b24a05ba9 /pkgs/applications/science | |
| parent | 870227bcb60f0d34915015fb077811011e458979 (diff) | |
| parent | 84fa0900084acb3886a2300f0fd1633a827ee071 (diff) | |
Merge pull request #265253 from wegank/verilog-clang
verilog: fix build on darwin
Diffstat (limited to 'pkgs/applications/science')
| -rw-r--r-- | pkgs/applications/science/electronics/verilog/default.nix | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/pkgs/applications/science/electronics/verilog/default.nix b/pkgs/applications/science/electronics/verilog/default.nix index 0a93759947d70..06e8a94a4c537 100644 --- a/pkgs/applications/science/electronics/verilog/default.nix +++ b/pkgs/applications/science/electronics/verilog/default.nix @@ -44,6 +44,10 @@ stdenv.mkDerivation rec { enableParallelBuilding = true; + env = lib.optionalAttrs stdenv.isDarwin { + NIX_CFLAGS_COMPILE = "-Wno-error=implicit-function-declaration"; + }; + # NOTE(jleightcap): the `make check` target only runs a "Hello, World"-esque sanity check. # the tests in the doInstallCheck phase run a full regression test suite. # however, these tests currently fail upstream on aarch64 |