1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
index 74f74b459f5f..dbf79f2f0060 100644
--- a/drivers/nvme/host/nvme.h
+++ b/drivers/nvme/host/nvme.h
@@ -161,6 +161,12 @@ enum nvme_quirks {
* Disables simple suspend/resume path.
*/
NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20),
+
+ /*
+ * Disables entering D3cold state for devices that might not wake up
+ * again afterwards.
+ */
+ NVME_QUIRK_NO_D3_COLD = (1 << 21),
};
/*
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 5c2a3af26d4d..a2615e2d543c 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -2915,6 +2915,15 @@ static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
dmi_match(DMI_BOARD_NAME, "NS5x_7xPU") ||
dmi_match(DMI_BOARD_NAME, "PH4PRX1_PH6PRX1"))
return NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND;
+ } else if (pdev->vendor == 0x144d && (pdev->device == 0xa80a ||
+ pdev->device == 0xa808)) {
+ /*
+ * Some Samsung SSDs on TUXEDO Pulse 15 Gen2 do not seem to
+ * wake up from D3cold.
+ */
+ if (dmi_match(DMI_BOARD_VENDOR, "NB02") &&
+ dmi_match(DMI_BOARD_NAME, "PF5LUXG"))
+ return NVME_QUIRK_NO_D3_COLD;
}
return 0;
@@ -2976,6 +2985,9 @@ static struct nvme_dev *nvme_pci_alloc_dev(struct pci_dev *pdev,
NVME_MAX_KB_SZ << 1, dma_opt_mapping_size(&pdev->dev) >> 9);
dev->ctrl.max_segments = NVME_MAX_SEGS;
+ if (quirks & NVME_QUIRK_NO_D3_COLD)
+ pci_d3cold_disable(pdev);
+
/*
* There is no support for SGLs for metadata (yet), so we are limited to
* a single integrity segment for the separate metadata pointer.
|
