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authorvolth <volth@volth.com>2020-08-22 22:55:13 +0000
committerGitHub <noreply@github.com>2020-08-22 22:55:13 +0000
commit55bc2b54a481f08bd9f7189561f9cf2f65f810c7 (patch)
tree84fc8b6108d9215ad32bbd4880ff0d72e0263085 /lib/systems
parent5c384e12682515ec87ff14838d66771dd1f7edf7 (diff)
Update architectures.nix
Diffstat (limited to 'lib/systems')
-rw-r--r--lib/systems/architectures.nix12
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/systems/architectures.nix b/lib/systems/architectures.nix
index 287f5be03c453..ce7ac0356bdc0 100644
--- a/lib/systems/architectures.nix
+++ b/lib/systems/architectures.nix
@@ -35,12 +35,12 @@ rec {
     # x86_64 Intel
     default        = [ ];
     westmere       = [ ];
-    sandybridge    = [ "westmere" ];
-    ivybridge      = [ "westmere" "sandybridge" ];
-    haswell        = [ "westmere" "sandybridge" "ivybridge" ];
-    broadwell      = [ "westmere" "sandybridge" "ivybridge" "haswell" ];
-    skylake        = [ "westmere" "sandybridge" "ivybridge" "haswell" "broadwell" ];
-    skylake-avx512 = [ "westmere" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" ];
+    sandybridge    = [ "westmere"    ] ++ inferiors.westmere;
+    ivybridge      = [ "sandybridge" ] ++ inferiors.sandybridge;
+    haswell        = [ "ivybridge"   ] ++ inferiors.ivybridge;
+    broadwell      = [ "haswell"     ] ++ inferiors.haswell;
+    skylake        = [ "broadwell"   ] ++ inferiors.broadwell;
+    skylake-avx512 = [ "skylake"     ] ++ inferiors.skylake;
     # x86_64 AMD
     btver1         = [ ];
     btver2         = [ ];